DigiKey package reference image
CY7C25682KV18-550BZXC is a 72-Mbit DDR II+ synchronous pipelined SRAM organized as 4M × 18 with a two-word burst architecture. It runs up to 550 MHz clock (1100 MHz DDR transfer) with 2.5-cycle read latency, using K/K input clocks for DDR timing. It operates from 1.7 V to 1.9 V VDD and 1.4 V to VDD VDDQ, and integrates ODT, CQ/CQ echo clocks, QVLD data-valid, PLL, and IEEE 1149.1 JTAG.
Key Specifications
| Complete manufacturer part number | CY7C25682KV18-550BZXC |
|---|---|
| Manufacturer | Infineon Technologies |
| Description | CY7C25682KV18-550BZXC is a 72-Mbit DDR II+ synchronous pipelined SRAM organized as 4M × 18 with a two-word burst architecture. It runs up to 550 MHz clock (1100 MHz DDR transfer) with 2.5-cycle read latency, using K/K input clocks for DDR timing. It operates from 1.7 V to 1.9 V VDD and 1.4 V to VDD VDDQ, and integrates ODT, CQ/CQ echo clocks, QVLD data-valid, PLL, and IEEE 1149.1 JTAG. |
| Package / case | PG-BGA-165-804 |
| Product category | Dual data rate (DDR) sync SRAMs |
| Pins | 165 |
| Operating Temperature (manufacturer catalog) | 0 °C to 70 °C |
| Architecture (manufacturer catalog) | DDR-II+ CIO, ODT |
| Density (manufacturer catalog) | 72 MBit |
| ECC (manufacturer catalog) | N |
| Frequency (manufacturer catalog) | 550 MHz |
| Interfaces (manufacturer catalog) | Parallel |
| On-Die Termination (manufacturer catalog) | Y |
| Operating Voltage (manufacturer catalog) | 1.7 to 1.9 V |
| Organization (X x Y) (manufacturer catalog) | 4Mb x 18 |
| Density (manufacturer family record) | 72 MBit |
| Frequency (manufacturer family record) | 550 MHz |
| Peak Reflow Temp (manufacturer family record) | 260 °C |
| Read Latency (Cycles) (manufacturer family record) | 2.5 |
| Family Name (Flip Electronics public specification) | CY7C25682KV18 |
| Memory Size (Flip Electronics public specification) | 72Mbit |
| Address Bus Width (Flip Electronics public specification) | 21Bits |
| Number of Bits per Word (Flip Electronics public specification) | 18Bits |
| Number of Words (Flip Electronics public specification) | 4Mword |
| Timing (Flip Electronics public specification) | Synchronous |
| Number of I O Lines (Flip Electronics public specification) | 18 |
| SRAM Type (Flip Electronics public specification) | DDR II+ |
| Number of Burst (Flip Electronics public specification) | 2 |
| Number of Ports (Flip Electronics public specification) | Single Port |
| Parameter source (third-party) | https://www.flipelectronics.com/Product/CY7C25682KV18-550BZXC-42330 |
| In stock | Contact for availability |
| Unit price | Request a quote |
| Lead time | To be confirmed |
Technical documentation and image source
Complete ordering code, package and nominal terminal count retain their manufacturer evidence. Confirm electrical pin functions, shared terminals and temperature scope in the linked datasheet. The image is a DigiKey package appearance reference, not a manufacturer photograph or a current-stock photograph. No certification or electrical interchangeability is inferred from the image.
DigiKey package reference image for PG-BGA-165-804. Confirm electrical pin functions in the datasheet. Actual lot appearance and top marking require current-lot confirmation.
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