CY7C1460KV33-200AXC
CY7C1460KV33-200AXC is a 36-Mbit (1M × 36) synchronous pipelined burst SRAM using No Bus Latency (NoBL) architecture for true back-to-back read/write transfers with zero wait states. It runs from a 3.3 V core supply with 3.3 V/2.5 V I/O and supports up to 200 MHz operation. Fully registered I/O, byte writes, linear or interleaved bursts, ZZ sleep mode, and IEEE 1149.1 JTAG boundary scan are included.
Key Specifications
| Complete manufacturer part number | CY7C1460KV33-200AXC |
|---|---|
| Manufacturer | Infineon Technologies |
| Description | CY7C1460KV33-200AXC is a 36-Mbit (1M × 36) synchronous pipelined burst SRAM using No Bus Latency (NoBL) architecture for true back-to-back read/write transfers with zero wait states. It runs from a 3.3 V core supply with 3.3 V/2.5 V I/O and supports up to 200 MHz operation. Fully registered I/O, byte writes, linear or interleaved bursts, ZZ sleep mode, and IEEE 1149.1 JTAG boundary scan are included. |
| Package / case | PG-TQFP-100-800 |
| Product category | Memory ICs |
| Pins | 100 |
| Operating Temperature minimum (manufacturer family record) | 0 °C |
| Operating Temperature maximum (manufacturer family record) | 70 °C |
| In stock | 8,283 pcs |
| Unit price | Request a quote |
| Lead time | To be confirmed |
Technical documentation and image source
Available manufacturer parameters matched to the complete ordering code. Historical captures may be used. Parameter verification does not certify product photography or current stock; consult the linked datasheet for conditions.
Some exact-order specifications remain to be confirmed in the manufacturer documentation.