Mouser package reference image
2.5 V / 3.3 V 1:5 Differential ECL/PECL/HSTL Clock / Data Fanout Buffer
Key Specifications
| Complete manufacturer part number | MC100LVEP14DTG |
|---|---|
| Manufacturer | onsemi |
| Description | 2.5 V / 3.3 V 1:5 Differential ECL/PECL/HSTL Clock / Data Fanout Buffer |
| Package / case | TSSOP-20 |
| Product category | Clock Drivers & Distribution |
| Pins | 20 |
| Operating temperature | To be confirmed |
| Type (manufacturer record) | Buffer |
| Type (manufacturer ordering record) | Buffer |
| Channels (manufacturer ordering record) | 1 |
| Input / Output Ratio (manufacturer ordering record) | 2:1:5 |
| Input Level (manufacturer ordering record) | CML, ECL, HSTL, LVDS |
| Output Level (manufacturer ordering record) | ECL |
| VCC Typ (V) (manufacturer ordering record) | 3.3 |
| tJitterRMS Typ (ps) (manufacturer ordering record) | 0.181 |
| tskew(o-o) Max (ps) (manufacturer ordering record) | 25 |
| tpd Typ (ns) (manufacturer ordering record) | 0.4 |
| tR & tF Max (ps) (manufacturer ordering record) | 225 |
| fmaxClock Typ (MHz) (manufacturer ordering record) | 2000 |
| In stock | Contact for availability |
| Unit price | Request a quote |
| Lead time | To be confirmed |
Technical documentation and image source
The description is the manufacturer overview associated with this complete ordering code. Model-specific fields cite the ordering record or documentation. Confirm electrical test conditions, physical dimensions and certification scope in the linked original documents.
Mouser package reference image for TSSOP-20. Confirm electrical pin functions in the datasheet. Actual lot appearance and top marking require current-lot confirmation.
Some exact-order specifications remain to be confirmed in the manufacturer documentation.
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