Manufacturer package outline drawing - not a product photo
PSOC™ Control C3 Performance Line is based on Arm® Cortex®-M33 multi-core architecture to meet the needs of industries that require precise control and demanding power conversion. The family completes Infineon system offering for best performance in power conversion applications in AI server PSUs, solar, SMPS, EV charging and robotics. With advanced security, the Performance Line is PSA L3 ready and prepared for Post-Quantum Cryptography.
Key Specifications
| Complete manufacturer part number | PSC3M8GFS3PAHQ1XQSA1 |
|---|---|
| Manufacturer | Infineon Technologies |
| Description | PSOC™ Control C3 Performance Line is based on Arm® Cortex®-M33 multi-core architecture to meet the needs of industries that require precise control and demanding power conversion. The family completes Infineon system offering for best performance in power conversion applications in AI server PSUs, solar, SMPS, EV charging and robotics. With advanced security, the Performance Line is PSA L3 ready and prepared for Post-Quantum Cryptography. |
| Package / case | PG-LQFP-100-30 |
| Product category | Microcontrollers |
| Pins | 100 |
| Operating Temperature (manufacturer catalog) | -40 °C to 115 °C |
| ADC (#, Max. Resolution @ Sample Rate) (manufacturer catalog) | SAR (4, 12-bit @ 25 msps) |
| BLE Maximum Data Rate (manufacturer catalog) | N/A |
| BLE Power Output (manufacturer catalog) | N/A |
| BLE RX Sensitivity (manufacturer catalog) | N/A |
| BLE Supported Frequency band (manufacturer catalog) | N/A |
| CAN (manufacturer catalog) | 2 |
| CapSense (manufacturer catalog) | N |
| Comparators (manufacturer catalog) | 11 |
| CPU (manufacturer catalog) | ARM Cortex-M33 |
| Cryptographics Accelerator (manufacturer catalog) | Y |
| DAC (#, Max. Resolution @ Sample Rate) (manufacturer catalog) | (2,12-bit) |
| DMA Channels (manufacturer catalog) | 16 |
| EEPROM Emulation (manufacturer catalog) | Y |
| Flash (manufacturer catalog) | 512 KByte |
| Frequency (manufacturer catalog) | 180 MHz |
| I/O Pins (manufacturer catalog) | 60 |
| I2S (manufacturer catalog) | 0 |
| LCD Direct Drive (manufacturer catalog) | N |
| Number of ADC Modules (manufacturer catalog) | 4 |
| Operating Voltage (manufacturer catalog) | 1.71 to 3.63 V |
| Operational Amplifier (manufacturer catalog) | 0 |
| PDM-PCM (manufacturer catalog) | 0 |
| Quad-SPI (manufacturer catalog) | 0 |
| Real Time Clock (manufacturer catalog) | Y |
| Secondary Core (manufacturer catalog) | 2x ARM Cortex-M33 @ 200MHz |
| Serial Communication Blocks (manufacturer catalog) | 7 |
| SRAM (manufacturer catalog) | 128 KByte |
| Timer/Counter/PWM Blocks (manufacturer catalog) | 26 |
| Universal Digital Blocks (manufacturer catalog) | 0 |
| USB I/O (manufacturer catalog) | 0 |
| USB Type (manufacturer catalog) | N/A |
| Comparators (manufacturer family record) | 11 |
| Flash (manufacturer family record) | 512 KByte |
| Frequency (manufacturer family record) | 180 MHz |
| I/O Pins (manufacturer family record) | 60 |
| I2S (manufacturer family record) | 0 |
| Number of ADC Modules (manufacturer family record) | 4 |
| PDM-PCM (manufacturer family record) | 0 |
| Peak Reflow Temp (manufacturer family record) | 260 °C |
| Serial Communication Blocks (manufacturer family record) | 7 |
| SRAM (manufacturer family record) | 128 KByte |
| Timer/Counter/PWM Blocks (manufacturer family record) | 26 |
| Universal Digital Blocks (manufacturer family record) | 0 |
| USB I/O (manufacturer family record) | 0 |
| In stock | Contact for availability |
| Unit price | Request a quote |
| Lead time | To be confirmed |
Technical documentation and image source
Manufacturer source fields matched to the complete ordering code. Historical source captures may be used; this does not confirm current availability. Temperature scope follows the cited record. Package reference image is not a stock-lot photograph. Consult the datasheet for electrical limits and test conditions.
Manufacturer package outline drawing - not a product photo for PG-LQFP-100-30. Confirm electrical pin functions in the datasheet. Actual lot appearance and top marking require current-lot confirmation.
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